Figure 1. Problems worked on paper
Task 2: Repeat the simulation work in Section 5. Demonstrate your results in embedded videos on your website.
Figure 2. Gvim code for the example in Section 5
Figure 3. Simulation for example in Section 5
Figure 2. Gvim code for the example in Section 5
Figure 3. Simulation for example in Section 5
Task 3: Repeat all the FPGA experiments in Section 7. Demonstrate your results in embedded videos on your website.
Figure 4. Gvim code for home alarm system
Video 1. Demonstration of home alarm system on FPGA
Figure 5. Gvim code for digital safe
Video 2. Demonstration of digital safe on FPGA
Figure 6. Gvim code for car counter
Video 3. Demonstration of car counter on FPGA
Figure 4. Gvim code for home alarm system
Video 1. Demonstration of home alarm system on FPGA
Figure 5. Gvim code for digital safe
Video 2. Demonstration of digital safe on FPGA
Figure 6. Gvim code for car counter
Video 3. Demonstration of car counter on FPGA
Task 4: Design a simple
digital system using the similar combinational logic design methods
shown in Section 7. Explain what the system is, show the design files,
demonstrate it on your FPGA. Demonstrate your results in embedded
videos on your website.
I did a full adder circuit that adds two binary numbers and a carry input, producing a sum and a carry output. The sum is calculated using XOR gates, and the carry output is determined through a combination of AND and OR gates.
Figure 7. Logic gate representation of a full adder
Figure 8. Gvim code of Full Adder
Video 4. Demonstration of the full adder on FPGA
I did a full adder circuit that adds two binary numbers and a carry input, producing a sum and a carry output. The sum is calculated using XOR gates, and the carry output is determined through a combination of AND and OR gates.
Figure 7. Logic gate representation of a full adder
Figure 8. Gvim code of Full Adder
Video 4. Demonstration of the full adder on FPGA