ENGR 338 - 2021 Fall

Lab 3:
Layout the R-2R DAC

By: Roxie Sandoval
  rlsandoval@fortlewis.edu


I. Introduction
The objective of this lab was to create a layout of the R-2R DAC in Electric VLSI using N-Well resistors, by first first converting the R-2R ladder into a set of subcells and connect with an ideal ADC, The schematic will be simulated using LTSpice.

 
II. Materials and Methods
i. Materials
1. Electric VLSI software
2. LTSpice software

ii. Method(s)
Using the R-2R ladder schematic from the previous lab, a subcell of the repeating resistors structure, was created. This was then created into an icon and it was copied ten times, connected and DRC checked. Then the layout for the subcell was created by using n-well resistors, this was placed into the schematic view, copied ten times, connected and DRC/LSV checked. Once, a clean DRC/LSV was recieved, the R2-R ladder icon was wired to the ideal ADC and simulated using LTSpice.  
   

III. Results
i. Task 1
The subcell was first created and can be seen below in Figure 1, because this is one of the first stages in the hierarchy of creating the R-2R ladder, it needed to be free of errors.


Figure 1: The  R-2R ladder icon, with a clean DRC.


Since the subcell icon was clear of errors, it was then copied and paste to create the ladder like that seen in Figure 2, this too needed to have a clean DRC. This would be used  in task two in this lab.



Figure 2:  The ladder created by the subcells with a clean DRC.

ii. Task 2
Figure 3, shows the n-well resistors laid out similar to the repeating resistors structure, this was also connected to create a ladder, like that in Figure 4.

Figure 3: The n-well resistors laid out like the subcell resistors, with a clean DRC.


Figure 4: The n-well resistors connected - creating R-2R ladder, with a clean DRC/LVS.

When the DRC/LVS was shown to have zero errors and topologies matched, it was connected to the ideal ADC, as shown in Figure 5.


Figure 5: The R-2R ladder paired with the ideal ADC.

This was simulated in LTSpice, it compared the Vin and Vout shown in pink and blue respectively in Figure 6. The simulation proved the R2-R ladder behaved and worked as expected.



Figure 6: Resulting simulation from the R-2R ladder.

IV. Discussion
The lab was proven successful in the simulated graph, which showed the ladder's output. Ensuring the schematics and layouts were free of errors helped in the progression of the lab and definately should be made a habit when designing.