CE 433 Embedded Devices
Quiz 4
Name: Lucien Verrone
Email:
ljverrone@fortlewis.edu
Introduction:
This quiz was a test of our
knowledge with serial/parallel in/out combinations.
Task:
The
code required an a parallel in, serial out FPGA implementation.
![](Debounce.png)
![](Quiz5Code.png)
![](PISO_quizCode.png)
Figure 1: PISO module code
Figure 2: PISO demonstration.