ENGR 338 - Course Project 2023 Fall
Name: Ian Van Horn
Email: imvanhorn1@gmail.com
Course Project: SAR ADC in Eletric VLSI
This project requires the Eletric VLSI software
Task 1: Create The SAR Block.
![](Images/3in_and_sch.png)
Figure 1: 3 input NAND
![](Images/DFF_sch.png)
Figure 2. DFF Schematic
![](Images/SAR_block_sch.png)
Figure 3: SAR Block Schematic
![](Images/SAR_block_sim_spice.png)
Figure 4: SAR Block Schematic Spice Results
Task 2: S/H and Comparator.
![](Images/S-H_schematic.png)
Figure 5: Sample and Hold Schematic
![](Images/S-H_sim_sch.png)
Figure 6: Sanple and Hold simulation schematic
![](Images/S-H_Spice.png)
Figure 7: Sample and Hold Spice Results
![](Images/S-H_OpAmp_sch.png)
Figure 8: Comparator(OP amp) attached to sample and hold with threshold at 2.5V
![](Images/S-H_OpAmp_sch_spice.png)
Figure 9: Spice results of Figure 8
Task 3: Compile SAR ADC.
![](Images/Clock_Sch.png)
Figure 10: Clock Block
![](Images/Door_Sch.png)
Figure 11: Door Schematic
![](Images/SAR_ADC_SCH.png)
Figure 12: SAR ADC schematic
![](Images/SAR_ADC_SPICE.png)
Figure 13: SAR ADC Sine wave conversion
![](Images/SAR_ADC_SPICE2.png)
Figure 14: SAR ADC Sine Wave conversion close up
Task 5: Conclusion
The assambly of the ADC helped me more deeply understand how it works.