1. Introduction

The electronics industry relies heavily on integrated circuits (ICs) and Field Programmable Gate Arrays (FPGAs) to create application-specific products for both consumers and manufacturers. In industrial applications, FPGAs are a more cost effective solution in smaller-volumed manufacturing facilities; This is due to the flexibility that FPGAs allow the engineer while designing the product.

FPGAs are controlled with code that is written in a hardware description language (HDL). The language used in these projects is Verilog. Unlike the programming related to microcontrollers (MCUs), the code is not compiled for the system, but it is synthesized. To write the code for FPGAs, a raw text editor is used with a circuit synthesizing software like Vivado. For the purposes of this class, the text editor Vim will be used with Vivado software to synthesize the circuits and simulate the behavior of the circuit described to the FPGA with Verilog.

2. Materials

Item
Computer
Vivado Software
Vim Text Editing Software

3. Procedure

To begin the lab, Vim and Vivado were installed onto a computer. Once the software was ready for use, Vim was opened to familiarize myself with the new system for controlling the cursor and new commands used in Vim. The commonly used shortcut keys are not the same with Vim; examples include, but are not limited to: undo is 'u' instead of 'ctrl + z", and copy is 'y' instead of 'ctrl + c' .

Video 1. A screen recorded demonstration of using the Vim text editing software. Note that the cursor is shown in the upper-right area of the screen.

Once using Vim felt a little more natural, a script was written for synthesis in Vivado. The script implemented register type variables in the testbench block to ensure that values were held for use in the description of the digital system. The system takes two inputs, binary integers, and it performs And and Or operations on them, and the results from those two gates have XOR logic implemented, and the second input is inverted as the second output signal.

A new project was created in Vivado, and the script written in Vim was imported into the project. The script was synthesized and in Vivado, and a simulation was ran. The results of this simulation can be found in Figure 1 below.

4. Results

The simulation ran successfully; the resulting waveforms matched with the truth table of the system's possible input/output combinations.

Figure 1. In this figure, the screensnip of the simulation results is shown in Vivado's user interface.

5. Discussion

Overall, the tasks are simple, but the methods used are almost completely different that what I am used to with other software. The challenge will be to get completely comfortable with Vim and hardware coding's structure of syntax.