Student Researcher
Cheyenne Tucson
Major
Computer Engineering
Bio
Cheyenne became a student at Fort Lewis College (FLC) in the fall of 2018. She graduated high school in 2014 with her cosmetology license in South Carolina, and has recieved reciprocity in New Mexico and Colorado. Her interest in the computer engineering field stems from her curiosity and infatuation with electronics as a teenager.
Cheyenne worked for Dr. Yiyan Li from the Summer of 2020 to the Fall of 2022. She has worked on projects related to robotics, analog/digital circuit design, embedded systems, integrated circuit specification analysis, python programming, and web development. Through these projects, she has expanded her knowledge of circuitry, learned various practical skills for designing circuits, gained experience in designing for clients, and further realized her passion for robotics, circuit design, and embedded systems.
E-mail: crtucson@fortlewis.edu
Youtube Channel
Projects and Related Presentations
Web Repository and Interactive Map for Borders and Languages (BL190)
This project involved deep learning (X)HTML and CSS to create an open source web repository of necessary resources to teach the Borders and Language course.
The web site was created to the liking and requirements of Dr. Carolina Alonso with content provided by Dr. Alonso. She is also hosting the website on her faculty FLC webspace. You can visit the webpage here.
Completing the Labs for CE Junior Design (CE 315)
This project involved completing the labs for the CE Junior Design class (CE315) to learn the basics of how to use ATMega328P MCUs how they work. This involved learning more about analog and digital circuit design, and how to use microcontrollers.
Line Following Car Tutorials for a new First Year Launch course taught by Dr. Yiyan Li
This project involved optimizing component placement for efficiency, analog-to-digital circuit design, creating an instruction manual/tutorial, and becoming aquainted with the PCB design process.
Course Work
CE 433 - Embedded Devices
Labs
- Lab 1 - Vivado, GVim Installation and Preparation
- Lab 2 - Introduction to Field Programmable Gate Array (FPGA)
- Lab 3 - Seven-Segment Display on a FPGA
- Lab 4 - Combinational Logic Blocks
- Lab 5 - A 3-bit Adder/Subtractor for 2's Complement Signed Binary Numbers
- Lab 6 - Basys3 FPGA to Implement a VGA Driver
Homework
ENGR 338 - Digital Electronics
Labs
- Lab 1 - Review Superposition, Thevenin's Equivalent Circuit, and LTSpice
- Lab 2 - Design a R-2R Ladder DAC
- Lab 3 - Layout a R-2R Ladder DAC
- Lab 4 - Building MOSFETs and Simulating IV Curves
- Lab 5 - Building a CMOS Inverter
- Lab 6 - Building NAND, NOR, and XOR Gates, and a Full Adder in Electric VLSI
- Lab 7 - Using Buses in Electric VLSI
- Lab 8 - Design a MUX and a High Speed Full Adder
- Lab 9 - Design a Simple 8-bit ALU
Projects
CE 351 - Microcontrollers