1. Lab 5 - A 3-bit Adder/Subtractor for 2's Compliment Signed Binary Numbers
2. Introduction
The purpose of this lab was to combine many of the things we've learned in this class to make a 2's compliment adder/subtractor.
3. Results Task 1 & 2: These
tasks asked us to use the led's ans seven-segment display on the Basys
3 board to display the results of the adder/subtractor we created.
Figure 1 shows the code for the adder/subtractor module used for the
actual calculations. Figure 2 shows the seven-segment display and
testbench code for interfacing with the Basys 3 board. Figure 3 shows
the results of these tasks in one video.
Figure 1. Code for 2's Compliment Adder/Subtractor and Supporting Full Adder Module
Figure 2. Code for Basys 3 Interfacing Testbench and SSD Display
Figure 3. Video of 2's Compliment Adder/Subtractor Implemented on Basys 3
4. Discussion This
lab was very interesting because we were able to implement many
methodologies we learned earlier in the course. I had many issues
interfacing with the SSD until I ran accross Dr.Li's tutorial on his
website. This helped solidify the logic in my head and I was finally
able to implement a solution that worked. However, I wish my previous
implementation had worked, but it was causing too many DRC errors to
chase down. I also suspect that if I had given more delay between
changing the negative sign and numbers there would have been less
overlap in the video.
