CE
433 2023 Spring
Lab 4
Name: Anders Burdick-Levang Email:
aaburdicklevang@fortlewis.edu
Lab #4
Draw
the truth table for all the states in one cycle of the traffic light
change. Simplify the logic equations for each light using the K map. Design
the Verilog model and the testbench, show the simulation results in
Vivado. Use 6 leds on your Basys 3 board to implement the design. Show
the demo video for credits. (50 points)
Traffic light symulation:
Implamentation on basys 3:
Task 2: Rushmode While
the first problem cycles through all states with the same durations,
during rush hours, the busy road has a longer duration for the green
light than the red light. Use a switch to trigger the rush hour mode,
which keeps one of the green lights ON for double the duration compared
to the other road. Show the code, code explanation, and demo video in
your report. ( 50 points)
