CE
433 2023 spring
HW6
Name: Anders Burdick-Levang Email:
aaburdicklevang@fortlewis.edu
HW #6 Task
1: Repeat the work in Section 2. Show the code, explanation, and a demo
video.
Task
2: Replace the clock generator IP with a self-made clock divider module
that generates 25MHz clock. Demonstrate that it works for the rest of
the circuit.Show the code, explanation, and a demo video.
Task
3: Complete the two examples in Section 3. Show the code, explanation,
and a demo video.