CE
433 2023 Spring
Final Project
Name: Anders Burdick-Levang Email:
aaburdicklevang@fortlewis.edu
Final Project
For this final; project, we were tasked with combining all of the
skills we learnd this semester. We needed to design a verilog
chip that would take analog signals from a potentiometer, or any other
analog input and convert it to be sent via SPI to an arduino which was
then read and sent to the serial terminal.
For my project, I first worked to ensure SPI comunicatrion, which I
used the information in this resource to create:
https://www.yilectronics.com/Courses/CE433/lectures/week10_SPI/week10_SPI.html
was working and able to comunicate with an arduino. Then it was a
simple matter of taking the analog input and adapting it to be sent via
SPI protocol.
The following is the resulting verilog code:
Then the Arduino code can be seen here:
This code reads/writes once every second to make the value readable.
Then here is a video presentation of it all working.
Conclusion: This was a very fun, yet challenging project that helped reinforce many of the things we learned this semsester.
