CE 338: Digital VLSI Design (Laboratory), Spring 2025
Labs:
1/16,  Lab 1 Design an R-2R DAC.
1/23, Lab 2 Layout the R-2R DAC.
1/30, Lab 3 MOSFETs and IV Curves.
2/6, Lab 4 The Inverter. 
2/13, Lab 5 Build a NAND, NOR, XOR, and Full Adder.
2/20,  Lab 6 Using Buses in ElectricVLSI.
2/27, Lab 7 Design a MUX, and a High-Speed Full Adder.
3/6, Lab 8 Design an 8-Bit ALU. (2-week lab)
3/13, Keep working on Lab 8.
3/27, Lab 9 Cadence Virtuoso 1
4/3, Lab 10 Cadence Virtuoso 2
4/10, Lab 11 Cadence RTL to GDS flow 1
4/17, Lab 12 Cadence RTL to GDS flow 2








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