2. Introduction
In this tutorial we developed and electro static discarge protection pad. This a critical part of any IC to protect it from static electicity that could accumilate on a finger and fry the chip. We started by creating two diodes, Nact and Pact, that are at the core of the ESD. Next we created a 1.5mm square to round out the ESD.
3. Materials and Methods
Electric VLSI was used to layout the ESD. We followed the tutorial 4 videos on Yilectronics.com to complete this task.
4. Results
Figure 1. Nact_Pwell diode layout
Figure 2. Pact_Nwell diode layout
Figure 3. ESD Pad layout using Pact and Nact diodes.
Figure 4. Padframe constructed using ESD pads
Figure 5. ESD padframe icon.
5. Discussion
This tutorial introduced new topics like an array of componants and diodes. This ESD frame we have designed can be used for several chips down the line.