Lab 5  A 3-bit Adder/Subtractor for 2's Complement Signed Binary Numbers (2-week lab)

An introduction video: (notes PDF)

Understand the 3-bit adder/subtractor in 2's complement:

Addition/Subtraction of 2's complement
signed binary numbers:
When the control bit is switched to '1', A XOR 1 = A not, so A is inverted, and plus 1 (at cin), which is exactly the 2's complement of A, the system will perform 'B+(-A)', which is 'B-A'; when the control bit is switched to '0', A XOR 0 =  A, and cin=0, the system will perform 'B+A'.

As the definition of 'overflow', if you have negtive + negative = positive, or positive + positive = negative, then the result of the addition is out of range, you need an extra bit to represent the result. The overflow indicator will show you when do you need to count an extra bit.

Your code should be able to tell FPGA what is the extra bit in order to display the correct corresponding decimal number.
For all the following three steps, show the code, explanation, and video demonstration.

Week 1:
Step 1: (30 points)
Use switches as the 3-bit inputs, use 'leds' to show the binary results.

Step 2: (30 points)
Use switches as the 3-bit inputs, use seven-segment displays to show the decimal result, make sure have the 'minus' sign in front of the decimal number if the result is negative.

Week 2:

Step 3: (40 points)
Use Serial In Parallel Out (SIPO) to input two 3-bit numbers [2:0] A, and [2:0] B, into the registers, then use one switch to trigger the computation.