Week 10 Serial Peripheral Interface (SPI)


Different from the UART, the SPI is a synchronous communication protocol. Besides, communication between the transmitter and receiver is duplex. In other words, data is transmitted and received at the same time in the SPI. Therefore, the SPI communication uses four wires. Two of these wires are for data transfer. One wire is used for the common clock signal (for synchronization). The fourth wire is used to enable (select) signal

Different from the UART, data packet size is not constant in the SPI. This is an advantage since the user can select the packet size as he or she desires. Moreover, the dedicated common clock and enable signals avoid using start and stop bits in the UART. The only requirement here is the need for determining the data packet size. Hence, the transmitter and receiver can understand each other.

SCK is generated by the leader and fed to the follower

Here, SCK depends on the maximum data rate of the transmitter and receiver. Hence, the device with the lowest rate defines its limit. Besides frequency, the leader also adjusts the polarity and phase of clock denoted by CPOL and CPHA, respectively. Four possible combinations of CPOL and CPHA are presented in the following figure. These combinations are called modes of the SPI.

Transmission and Reception Operations

In the SPI, the data transmission and reception is controlled by the leader through SCK and signals. When there is no transmission, stays at logic level 1 and SCK stays either at logic level 0 or 1 depending on the SPI mode.

The SPI communication starts when the leader wakes the follower by setting to logic level 0. Next, the leader and follower start interchanging data in every clock cycle set by SCK. Here, either the leader sends a bit through MOSI line or the follower sends a bit through MISO line. The SPI mode also determines if data will be sent on the rising or falling edge of SCK. After all bits are transferred, the common clock stops and leader deselects the follower by changing to logic level 1.

Read this PDF from the textbook to understand the operation of SPI.

The MOSI of the leader and the follower:
Leader transmitter:

Follower receiver:

The MISO of the leader and the follower:

Line 18 for the SPI_leader_receiver module, I used 8'd25 instead of 24 in the textbook.

2. SPI Application - the PmodALS ambient light sensor

The system diagram folllows:

The PmodALS sensor is plugged in to the top row of the JB pins on the Basys 3 baord.

Some changes must be made to the constraint file to make it work. Make those changes to the contraint file to make it work as demonstrated in the following video.

I used a flash light to test the sensor. You can find that the maximum value is 255, which is the 8-bit binary value.

 Repeat the tasks in Section 2 (100 points)