Lab 4 Nic Theobald

CE 338 2021 Spring
Lab 4: MOSFETs and IV Curves
Nic Theobald
nstheobald@fortlewis.edu

MOSFETs and IV Curves

Introduction

This lab covers the design and simulation of n-type and p-type MOSFET transistors. MOSFETS are special in that they are voltage controlled current sources that, as opposed to BJT transistors, don't draw current when turned off. This lab was intended to familiarize students with the MOSFET transistor, IV curves, and electricVLSI. I performed the same lab in a previous course. I redesigned and ran everything, just like before, but didn't detail the process in as much detail, during this report.

Methods and Materials


Item	Quantity

LTspice Electric VLSI Ideal ADC/DAC Library	1 1 1

The schematic of the NMOS transsitor was first created (Figure 1). Then the layout for the NMOS was created (Figure 2). The NMOS was then simulated (Figure 3). The exact same process was followed for the PMOS transistor. DRC, NCC, and ERC checks were also performed.

Results

Design and Simulate NMOS Transistor

The schematic and layout for the NMOS transistor was first created.

Figure 1: Schematic view of the NMOS transistor.

The schematic and layout for the NMOS transistor was first created.

Figure 2: Layout view of the NMOS transistor.

An LTspice simulation of the IV curve was performed.

Figure 3: Simulation of NMOS IV curve.

Design and Simulate PMOS Transistor

The schematic and layout for the PMOS transistor was first created.

Figure 4: Schematic view of the PMOS transistor.

The schematic and layout for the PMOS transistor was first created.

Figure 5: Layout view of the PMOS transistor.

An LTspice simulation of the IV curve was performed.

Figure 4: Simulation of PMOS IV curve.

Discussion:

This lab detailed the design and simulation of an NMOS and PMOS transistor. The same procedures were followed at a previous time, so this report was not as detailed.