Lab 9
ENGR 338
James Ferguson


The goal of this lab is to create a 8-bit arithmetic logic unit (ALU) that is capable of ADDITION, SUBTRACTION, OR, and AND in Electric VLSI.


The following shows the layout and schematic of an ALU. A selection code of 00 is ADD, 01 is SUBTRACT, 10 is OR, 11 is AND.

The design for the layout uses metal 3 for horizontal wires, metal 2 for vertical wires, and metal 1 for power and ground.

The designs passed all error checks.


Below shows a simulation of the ALU.


The designed ALU appears to be function as expected.