Spring 2019

ENGR 338 Digital Electronics Laboratory

Lab: 1/7/2019 – 4/26/2019, R 8:00 – 11:05 am for section 2 and 2:30 – 5:35 pm for section 1. Location: SFH 760


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Student lab reports
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Labs:
Jan 10, Lab 1, LTSpice/RC Circuit for Digital Signal/Edit your webpage to report the lab results. Due Wed, Jan 16, at 10 pm.
video
Jan 17, Lab 2, More Spice. Compensated Probe for Digital Signal Probing. Due Jan 23, at 10 pm.
video, notes
Jan 24, No Labs.
Jan 31, Lab 3, The Inverters and NMOS/PMOS Transistors. Due Feb 6, at 10 pm.

video
Feb 7, Lab 4, Logic Gates. Due Feb 13, at 10 pm
video (morning)
video, schematic NAND, schematic NOR (afternoon)
Feb 14,  Lab 5, Seven segment display. Due Feb 20, at 10 pm
video (morning)
Feb 21, Lab Cancelled Due to Snow.
Feb 28, Lab 6, Introduction to FPGA. Due Mar 13, at 10 pm
video (morning) and video (afternoon)
Lab 7, Adders. Due Mar 20, at 10 pm.
video (morning)
Lab 8, The Decoder (Design a traffic light controller). Due Mar 27, at 10 pm.
video (morning)
Lab 9, 
More FPGA Experiments. Due Apr 3, at 10 pm.
video (morning)
Lab 10, The Flip Flops. Due Apr 10, at 10 pm.
video, notes (morning)
video, notes (afternoon)


Lab 11, A 3-Bit 2's Complement Add/Subtractor on an FPGA. Due Apr 17, at 10 pm.
video (morning), video (afternoon)







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