337: Analog Electronics (Laboratory), Spring 2018
Yiyan Li, Office hours: Monday and Wednesday during 10:10 – 11:05,
13:30 – 14:25, and 15:30 – 17:00, starting Jan 8.
about how to edit
your webpage at yilectronics.com
or just simply use Windows Explorer for the FTP purposes.
HTML templates can be downloaded here.
Please follow the lab report format shown here to avoid losing
MOSIS ON Semiconductor fabrication 2018 schedule
is available in SFH760: Open My PC - C Drive - Program Files - LTC,
you can find LTSpice there, right click on the icon, and create a
shortcut onto your desktop.
Jan 9, Lab1 Lab equipment and edit your webpage for your lab report.
Due Jan 15, Monday 10 pm.
Jan 16, Lab2 Use LTSpice for circuit simulation. Due Jan 22, Monday 10 pm.
Jan 23, Lab3 The compensated probe. Due Jan 29, Monday 10 pm.
Jan 30, Lab4 Operational
amplifiers. Due Feb 5, Monday 10 pm.
Feb 6, Lab5 Rectifiers and DC
Regulators. Due Feb 12, Monday 10 pm.
Feb 13, Lab6 Instrumentation Amplifier. Due Feb 19, Monday 10 pm.
Feb 20, Lab7 Integrated Circuit Layout in ElectricVLSI. Due Feb 26, Monday 10 pm. (Report whatever you have so you can get credit for this lab. I understand you may not finish them)
Feb 27, Lab8 Design, Simulation, and Layout Inverters, and NAND Gates.
Mar 13, Lab9 Design, Simulation, and Layout A Biasing Circuit.
Mar 20, Lab10 Design, Simulation, and Layout an Op Amp.
Mar 27 - Apr 2, Project, Placing Circuit Layouts in a Padframe for Fabrication.
Apr 16, Lab11 BJT Amplifiers.
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