Course Syllabus
CE 241 Fundamentals of Computer Logic (Online)
Fort Lewis College – Computer Engineering

1. Professor:
Dr. Yiyan Li, email: yli@fortlewis.edu

2. Course Overview
This course introduces students to the basic concepts of digital systems, including analysis and design. Both combinational and sequential logic will be covered. Students will gain experience with several levels of digital systems, from simple logic circuits to programmable logic devices and hardware description language. This is the fundamental course in computer engineering. This course will provide the fundamental background needed to understand how digital systems work and how to design digital circuits.

3. Course Topics
• Binary number systems, number representations.
• Boolean algebra Boolean functions.
• Logic gates and circuits.
• Logic simplification using Boolean algebra and Karnaugh maps.
• Combinational logic design and building blocks.
• Synchronous sequential logic design and state machines.
• Latches, flip-flops, registers, and counters.
• Programmable logic.
• Verilog programming.

4. Course Outcomes
Students completing this course should be able to:
1. Represent and manipulate decimal numbers in different coding systems and convert decimal numbers between different positional number systems including decimal, binary (unsigned, signed-magnitude, and two’s complement), hex, and octal.
2. Do negation and addition in the two’s complement number system, and detect overflow.
3. Express and simplify logic expressions using the theorems of Boolean algebra and Karnaugh maps.
4. Find the minimal sum-of-products (SOP) and product-of-sums (POS) expressions, and create a corresponding circuit from AND, OR, NAND, and NOR gates.
5. Analyze and design combinational and sequential digital systems and use standard combinational and sequential digital building blocks including adders, multiplexers, decoders, encoders, and registers.
6. Analyze and design clocked synchronous state machines.
7. Calculate the propagation delays through a circuit and draw a timing diagram.
8. Design and simulate digital circuits using Hardware Description Language (HDL).
9. Describe in gate-level modeling, dataflow modeling, and behavioral modeling and implement the functionality of digital systems (e.g., logic and arithmetic functions, flip-flops, registers and counters, and state machines) in Verilog.

5. Course Modules and Schedule
•    MODULE 0: Course Information
•    MODULE 1: The Number System and Boolean Algebra (Week 1, 5/4/2020 – 5/8/2020)
•    MODULE 2: CMOS Transistors, Logic Gates, and LTSpice (Week 2, 5/11/2020 – 5/15/2020)
•    MODULE 3: Logic Simplification and the K Map (Week 3, 5/18/2020 – 5/22/2020)
Midterm Exam 5/22/2020 at 9 am, close-book, close-notes, 90 min.
•    MODULE 4: Adders, MUX, Decoders, Static Hazard, and Timing Diagram (Week 4, 5/25/2020 – 5/29/2020)
•    MODULE 5: Sequential Logic, FPGA, and Verilog (Week 5, 6/1/2020 – 6/5/2020)
Final Exam 6/5/2020 at 9 am, close-book, close-notes, 90 min.

6. Prerequisite
ENGR 201 Electric Networks minimum grade C- OR PHYS 218 Physics II minimum grade C-

7. Textbook
Jr., Charles H. Roth, Larry L Kinney, Charles H. Roth Jr., Larry L. Kinney, Fundamentals of Logic Design, 6th Edition / Edition 6 (Required).
R. Jacob Baker, CMOS: Circuit Design, Layout, and Simulation, 3rd Edition (Recommended).