CE 241 Fundamentals of
Computer Logic (Online)
Fort Lewis College – Computer
Dr. Yiyan Li, email:
This course introduces
students to the basic concepts of digital systems, including analysis
and design. Both combinational and sequential logic will be covered.
Students will gain experience with several levels of digital systems,
from simple logic circuits to programmable logic devices and hardware
description language. This is the fundamental course in computer
engineering. This course will provide the fundamental background needed
to understand how digital systems work and how to design digital
• Binary number systems,
• Boolean algebra Boolean
• Logic gates and circuits.
• Logic simplification using
Boolean algebra and Karnaugh maps.
• Combinational logic design
and building blocks.
• Synchronous sequential
logic design and state machines.
• Latches, flip-flops,
registers, and counters.
• Programmable logic.
• Verilog programming.
Students completing this
course should be able to:
1. Represent and manipulate
decimal numbers in different coding systems and convert decimal numbers
between different positional number systems including decimal, binary
(unsigned, signed-magnitude, and two’s complement), hex, and octal.
2. Do negation and addition
in the two’s complement number system, and detect overflow.
3. Express and simplify logic
expressions using the theorems of Boolean algebra and Karnaugh maps.
4. Find the minimal
sum-of-products (SOP) and product-of-sums (POS) expressions, and create
a corresponding circuit from AND, OR, NAND, and NOR gates.
5. Analyze and design
combinational and sequential digital systems and use standard
combinational and sequential digital building blocks including adders,
multiplexers, decoders, encoders, and registers.
6. Analyze and design clocked
synchronous state machines.
7. Calculate the propagation
delays through a circuit and draw a timing diagram.
8. Design and simulate
digital circuits using Hardware Description Language (HDL).
9. Describe in gate-level
modeling, dataflow modeling, and behavioral modeling and implement the
functionality of digital systems (e.g., logic and arithmetic functions,
flip-flops, registers and counters, and state machines) in Verilog.
Modules and Schedule
• MODULE 0:
• MODULE 1:
The Number System and Boolean Algebra (Week 1, 5/4/2020 – 5/8/2020)
• MODULE 2:
CMOS Transistors, Logic Gates, and LTSpice (Week 2, 5/11/2020 –
• MODULE 3:
Logic Simplification and the K Map (Week 3, 5/18/2020 – 5/22/2020)
Midterm Exam 5/22/2020 at 9
am, close-book, close-notes, 90 min.
• MODULE 4:
Adders, MUX, Decoders, Static Hazard, and Timing Diagram (Week 4,
5/25/2020 – 5/29/2020)
• MODULE 5:
Sequential Logic, FPGA, and Verilog (Week 5, 6/1/2020 – 6/5/2020)
Final Exam 6/5/2020 at 9 am,
close-book, close-notes, 90 min.
ENGR 201 Electric Networks
minimum grade C- OR PHYS 218 Physics II minimum grade C-
Jr., Charles H. Roth, Larry L
Kinney, Charles H. Roth Jr., Larry L. Kinney, Fundamentals of Logic
Design, 6th Edition / Edition 6 (Required).
R. Jacob Baker, CMOS: Circuit
Design, Layout, and Simulation, 3rd Edition (Recommended).
A: 93-100, A-: 90-92, B+:
87-89, B: 83-86, B-: 80-82, C+: 77-79, C: 73-76, C-: 70-72, D+: 67-69,
D: 63-66, D-: 60-62, F: < 60
Late submissions will not be
Cheating or plagiarism will
result in an automatic F grade in the course (so do your own homework
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